1. Field
The present disclosure relates to a transistor drive circuit, a constant voltage circuit, and a method thereof, and more particularly to a transistor drive circuit, a constant voltage circuit, and a method thereof capable of effectively generating a constant output voltage with a power transistor by using two or more error amplifying circuits.
2. Discussion of the Related-Art
A background related-art constant voltage circuit can be grouped into two types; a power supply circuit having a relatively greater current consumption with improvements in a ripple elimination ratio and load transient response characteristics and another power supply unit having a relatively small current consumption with an inferiority in response characteristics.
An apparatus such as a mobile cellular phone has a regular operation mode which operates with a regular current consumption and a standby mode (e.g., a sleep mode) which does not normally need a relatively high responsivity and consumes a relatively small amount of current. In such an apparatus, the constant voltage circuit has a problem of consuming a wasteful current in a standby mode which does not normally need a relatively high responsivity.
FIG. 1 illustrates one example of the background related-art constant voltage circuit introduced with an attempt to solve the above-mentioned problem. In FIG. 1, a constant voltage circuit 100 includes a reference voltage generator 102, an output voltage detector 103, a first error amplifying circuit 104, a second error amplifying circuit 105, an output transistor M101. The reference voltage generator 102 generates a reference voltage Vref. The output voltage detector 103 includes resistances R101 and R102 which are connected in series between an output terminal OUT and an earth ground. The output voltage detector 103 generates a voltage Vfb having a voltage value in proportion to an output voltage Vo. The first error amplifying circuit 104 has characteristics of a large current consumption and a faster responsivity. Contrary to it, the second error amplifying circuit 105 has characteristics of a small current consumption and a slow responsivity. The output transistor M101 is controlled by the first and second error amplifying circuits 104 and 105 to control the output voltage Vo to be a constant voltage.
A controller 100 connected to the first error amplifying circuit 104 starts and stops operations of the first error amplifying circuit 104. The controller 100 activates the first error amplifying circuit 104 to initiate an operation in the normal mode. Also, the controller 100 stops the first error amplifying circuit 104 and reduces an operative current of the first error amplifying circuit 104.
In the configuration of FIG. 1, the reference voltage Vref input to the first and second error amplifying circuits 104 and 105 is substantially equal to the voltage Vfb generated in proportion to the output voltage Vo. Therefore, if the first and second error amplifying circuits 104 and 105 have input offset voltages different from each other, the output voltage Vo may vary by a voltage value of Vdif*(Vo/Vfb) between a time when the first error amplifying circuit 104 is activated and a time when the second error amplifying circuit is activated.
Also, the output voltage Vo may vary if an amplifying ratio is different between the first and second error amplifying circuits 104 and 105.